1. Field of the Invention
The present invention relates to an analog compressor and an analog expander for use in a mobile communication apparatus such as a mobile telephone, which is designed to reduce signal noise.
2. Description of the Related Art
Generally a compander is used to reduce signal noise in a mobile telephone. A compander comprises a compressor circuit and an expander circuit which are provided in the transmitting section and receiving section of a mobile telephone, respectively.
An example of conventional companders of this type is disclosed in K. Takasuka, A Sigam Delta Based Square-Law Compander, Proceeding of CICC, 1990. This compander comprises a compressor circuit and a expander circuit, which will be described in the following.
The compressor circuit includes a .SIGMA..DELTA.-modulation type A/D converter (.SIGMA..DELTA.ADC), a D/A converter (DAC), a low-pass filter (LPF), a rectifier, a polarity detector, a clock generator, and a potential detector. The .SIGMA..DELTA.ADC is connected to receive an input signal vin. The DAC receives the output of the .SIGMA..DELTA.ADC and a reference potential. The LPF removes noise from a signal output from the DAC, thereby generating an output signal Vout. The rectifier rectifies or smoothes the output signal Vout, thus providing a DC potential and applying it to the .SIGMA..DELTA.ADC. The polarity detector detects the polarity of the input signal Vin. The clock generator generates a clock signals for controlling the rectifier, in accordance with the output of the polarity detector. The potential detector detects the output potential of the rectifier.
The expander circuit disclosed in A Sigam Delta Based Square-Law Compander is designed to expand the signals compressed by the compressor circuit, thereby converting them back to uncompressed ones. The expander circuit comprises a .SIGMA..DELTA.-modulation type A/D converter (.SIGMA..DELTA.ADC), a rectifier, a polarity detector, a clock generator, a D/A converter (DAC), and a low-pass filter (LPF). .SIGMA..DELTA.ADC receives an input signal Vin and a reference potential. The rectifier rectifies or smoothes the input signal Vin, thus providing a DC potential. The polarity detector detects the polarity of the input signal Vin. The clock generator generates a clock signals for controlling the rectifier, in accordance with the output of the polarity detector. The DAC receives the output of the .SIGMA..DELTA.ADC and the output of the rectifier. The LPF removes noise from a signal output from the DAC, thereby generating an output signal Vout.
Both the compressor circuit and the expander circuit are digital circuits of .SIGMA..DELTA.-modulation type. Each has a .SIGMA..DELTA.-modulation type A/D converter and a .SIGMA..DELTA.-modulation type D/A converter. The A/D converters and the D/A converters are used as multipliers. Hence, the compressor circuit and the expander circuit constitute a compander. Since the compressor circuit and the expander circuits process digital signals, the compander is inevitably a complex and large-scale circuit, the signals are delayed considerably, and the sound reproduced from the output signals are of low quality. Furthermore, the low-pass filter, used as a smoothing filter, is indispensable in the output section. This renders the compander larger and more complex. Complex and large-scale, the compander consumes much power.
In short, the conventional analog compander is disadvantageous in that its circuit configuration is complex and large-scale, it delays signals considerably, and the sound reproduced from its output signals is of low quality, and it consumes much power.